RAG-Enhanced Kernel-Based Heuristic Synthesis (RKHS): A Structured Methodology Using Large Language Models for Hardware Design
TLDR
RKHS uses LLMs, RAG, and kernel templates to systematically synthesize hardware design heuristics, reducing schedule length by 11%.
Key contributions
- Introduces RKHS, a methodology for synthesizing reusable hardware optimization heuristics using LLMs.
- Integrates retrieval-augmented generation (RAG) with compact kernel heuristic templates for structured synthesis.
- Employs an LLM-driven iterative refinement loop for enhanced heuristic generation.
- Reduces average schedule length by up to 11% in HLS list scheduling with minimal runtime overhead.
Why it matters
This paper addresses the challenge of designing complex heuristics for EDA tools by leveraging LLMs. RKHS offers a systematic, generalizable approach to synthesize reusable optimization strategies. Its application shows significant performance gains in hardware scheduling, paving the way for more efficient automated hardware design.
Original Abstract
Heuristic design upholds modern electronic design automation (EDA) tools, yet crafting effective placement, routing, and scheduling strategies entails substantial expertise. We study how large language models (LLMs) can systematically synthesize reusable optimization heuristics beyond one-shot code generation. We propose RAG-Enhanced Kernel-Based Heuristic Synthesis (RKHS), which integrates retrieval-augmented generation (RAG), compact kernel heuristic templates, and an LLM-driven refinement loop inspired by iterative self-feedback. Applied to latency-minimizing list scheduling in high-level synthesis (HLS), a prototype reduces average schedule length by up to 11 percent over a baseline scheduler with only 1.3x runtime overhead, and the structured retrieval-synthesis loop generalizes to other EDA optimization problems.
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