Structural Dependency Analysis for Masked NTT Hardware: Scalable Pre-Silicon Verification of Post-Quantum Cryptographic Accelerators
TLDR
A new four-stage verification hierarchy enables scalable pre-silicon side-channel resistance analysis for post-quantum cryptographic accelerators.
Key contributions
- Introduces a four-stage verification hierarchy for sound first-order masking verification.
- Scales to large production modules, demonstrated on a 1.17M-cell ML-DSA/ML-KEM accelerator.
- Reduces manual side-channel review from hundreds of flags to 165 actionable candidates.
- Verdicts are cross-validated by Z3 and CVC5 with zero disagreements.
Why it matters
This paper solves the challenge of verifying side-channel resistance in large post-quantum crypto hardware, essential for FIPS 140-3. It drastically reduces manual review, enabling faster pre-silicon verification and secure PQC development.
Original Abstract
Post-quantum cryptographic accelerators require side-channel resistance evidence for FIPS 140-3 certification. However, exact masking-verification tools scale only to gadgets of a few thousand cells. We present a four-stage verification hierarchy, D0/D1 structural dependency analysis, fresh-mask refinement, Boolean Single-Authentication Distance Checking (SADC), and arithmetic SADC, that extends sound first-order masking verification to production arithmetic modules. Applied to the 1.17-million-cell Adams Bridge ML-DSA/ML-KEM accelerator, structural analysis completes in seconds across all 30 masked submodules. A multi-cycle extension (MC-D1) reclassifies 12 modules from structurally clean to structurally flagged. On the 5,543-cell ML-KEM Barrett reduction module, the pipeline machine-verifies 198 of 363 structurally flagged wires (54.5%) as first-order secure, reports 165 as candidate insecure for designer triage (a sound upper bound), and leaves 0 indeterminate. Every verdict is cross validated by Z3 and CVC5 with 0 disagreements across 363 wires. The result narrows manual review from hundreds of structural flags to 165 actionable candidates with mathematical certificates, enabling pre-silicon side-channel evidence generation on production ML-KEM hardware.
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